In order to compensate transmission attenuation of ultrasonic inspection signal in bogie of CRT

take advantage of ultrasonic wave transducer

according to theory of DGC and the attenuation law of week signal at different depth

the design is about the method and the circuit of FPGA-based digital controlling gain amplification compensation.Firstly

PLL module of FPGA in type XC6SLX16 produces exact clock control signal to control gain amplification magnitude of AD8330 by compensation voltage curve produced by output digital quantity to DA chip

then echo simulation signal is transmitted into LTC2249 chip and converted into digital signal

so that can be used in the reprocessing of the next level digital signal.Experimental results show that by adding sine wave whose frequency is 5 MHz and peak to peak value is 2 mV into the circuit input end of the ultrasonic fault detector system and altering the three different gain magnitudes of the 5 dB stepping to realize different amplification gains which can compensate attenuation.