Design of high performance buffer for cryogenic IR plane array readout circuit

YAN Guang; ZHAO Yi-qiang

doi:10.13873/j.1000-97872013.05.024

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Design of high performance buffer for cryogenic IR plane array readout circuit

更新时间：2025-09-11

- Design of high performance buffer for cryogenic IR plane array readout circuit
- Vol. 32, Issue 5, Pages: 128-130+134(2013)
- 作者机构：
  
  天津大学电子信息工程学院
- 作者简介：
- 基金信息：
- DOI：10.13873/j.1000-97872013.05.024
  CLC： TN432
- Published：2013
- 稿件说明：
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[1]闫广,赵毅强.低温红外面阵读出电路中的高性能缓冲器设计[J].传感器与微系统,2013,32(05):128-130+134.

YAN Guang, ZHAO Yi-qiang. Design of high performance buffer for cryogenic IR plane array readout circuit[J]. 2013, 32(5): 128-130+134.
[1]闫广,赵毅强.低温红外面阵读出电路中的高性能缓冲器设计[J].传感器与微系统,2013,32(05):128-130+134. DOI： 10.13873/j.1000-97872013.05.024.

YAN Guang, ZHAO Yi-qiang. Design of high performance buffer for cryogenic IR plane array readout circuit[J]. 2013, 32(5): 128-130+134. DOI： 10.13873/j.1000-97872013.05.024.

摘要

使用chrt 0.35μm 3.3V CMOS工艺设计了用于制冷型红外面阵读出电路的高性能输出缓冲器

该缓冲器能在红外读出电路5M/s的读出速度下驱动约25pF的负载电容

在输出幅度为2V的条件下

建立时间为40ns

平均功耗为3.94mA。给出了修改chrt 0.35μm后的模型参数的仿真结果与最后的测试结果

基本满足红外读出电路的设计要求。

Abstract

A high-performance output buffer for cooling infrared（IR）plane array ROIC is designed using chrt 0.35 μm 3.3V CMOS technology.The buffer drives a load capacitance of about 25 pF with readout rate 5M/s of IR readout circuit.In the condition of output 2V

setup time is 40ns and average power consumption is 3.94 mA.Simulation result and final test result of model parameters of chrt 0.35 μm is given

which basicly meets design requirements of infrared readout circuit.

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references

基于红外成像系统的低温读出电路设计技术研究 [D]. 赵宏亮. 天津大学 2012

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