您当前的位置:
首页 >
文章列表页 >
Design of FPGA-based high speed synchro-to-digital converter
更新时间:2025-09-11
    • Design of FPGA-based high speed synchro-to-digital converter

    • Issue 8, Pages: 35-37+40(2007)
    • DOI:10.13873/j.1000-97872007.08.015    

      CLC: TP273.5
    • Published:2007

    移动端阅览

  • MENG Hua, ZHAO Jiao. Design of FPGA-based high speed synchro-to-digital converter[J]. 2007, (8): 35-37+40. DOI: 10.13873/j.1000-97872007.08.015.

  •  
  •  
icon
试读结束,您可以激活您的VIP账号继续阅读。
去激活 >
icon
试读结束,您可以通过登录账户,到个人中心,购买VIP会员阅读全文。
已是VIP会员?
去登录 >

0

Views

170

下载量

0

CSCD

Alert me when the article has been cited
提交
Tools
Download
Export Citation
Share
Add to favorites
Add to my album

Related Articles

Study on application of nickel-chromium alloy wire in differential transformer displacement sensor
River flow velocity and flow measurement system based on multi-conductance flow velocity measurement sensor
Design and implementation of FPGA recursive architecture based on Steger algorithm

Related Author

ZHANG Yongchao
ZHAO Luhuai
PANG Pengfei
ZHANG Yongchao
ZHAO Luhuai
LI Bin
ZHANG Yuan
ZHANG Guang-jun

Related Institution

Xi’an Jiaotong University City College
School of Electrical Engineering,Xi’an Jiaotong University
Key Laboratory of Precision Opto-mechatronics Techonology,Ministry of Education,School of Instrumental Science and Opto-electronics Engineering,Beihang University
0