According to the self-designed X-ray detector readout chip large amount of data

fast speed and continuity feature

designed a data acquisition and real-time transmission system based on field programmable logic gate array（FPGA）

double-data-rate two synchronous dynamic random access memory（DDR2） and USB 3. 0. The system uses FPGA and USB 3. 0 protocol as the core. The FPGA collects 24-channel digital signal from the X-ray detector readout chip and sends it to the DDR2 memory for caching. The cached data is finally transmitted to the PC side by USB3. 0 interface for real-time processing. The data acquisition throughput rate of the system can reach2 400 Mbps

and the USB interface transmission rate can reach 2. 5 Gbps

which can meet the requirements of highspeed acquisition and real-time transmission in X-ray detection systems.