Design of high-speed sampling system based on DSP + FPGA

SUN Chang; MIAO Si-en

doi:10.13873/J.1000-9787(2018)09-0047-03

Chinese

您当前的位置：

首页 >

文章列表页 >

Design of high-speed sampling system based on DSP + FPGA

更新时间：2025-09-11

- Design of high-speed sampling system based on DSP + FPGA
- Issue 9, Pages: 47-49(2018)
- 作者机构：
  
  浙江大学能源工程学院
- 作者简介：
- 基金信息：
- DOI：10.13873/J.1000-9787(2018)09-0047-03
  CLC： TH133.7
- Published：2018
- 稿件说明：
移动端阅览
SUN Chang, MIAO Si-en. Design of high-speed sampling system based on DSP + FPGA[J]. 2018, (9): 47-49.
DOI：

SUN Chang, MIAO Si-en. Design of high-speed sampling system based on DSP + FPGA[J]. 2018, (9): 47-49. DOI： 10.13873/J.1000-9787(2018)09-0047-03.

摘要

对飞轮转子位移信息的采样检测是保证飞轮储能系统(FESS)高速、稳定运行的关键。利用数字信号处理器(DSP)的计算能力和现场可编程门阵列(FPGA)的并行处理能力

采用主从设计方式

提出了一种基于DSP和FPGA的多通道、高速采样系统的实现方法;阐述了系统的模块功能、硬件布局、软件设计以及对高速AD芯片THS1207的控制方式。实验证明了设计的系统能够实现多通道、高速采样的要求。

Abstract

The sampling examination of flywheel rotor displacement information is the key for ensuring high-speed and stable operation of fly wheel energy storage system（ FESS）. Based on the calculation ability of digital signal processor（ DSP） and the parallel processing ability of field programmable gate array（ FPGA）

adopting master/slave design mode

a multi-channel

high-speed sampling system realization method based on DSP and FPGA is proposed. Module function

hardware layout and software design of the system as well as control mode for highspeed AD chip THS1207 are elaborated. It is proved by experiment that the desiged system can achieve requirements of multi-channel and high-speed sampling.

关键词

Keywords

references

Views

334

下载量

CSCD

Alert me when the article has been cited

提交

Tools

Publicity Resources

Design of pedestrian detection system for underground track based on DSP+FPGA

Design of real-time data acquisition system for passive acoustic detection based on DSP and FPGA

Design of LFMCW radar ranging signal processing system based on DSP + FPGA

Design of vision sensor based on the technology of DSP and FPGA hierarchical image processing

Recognition of two-dimensional code based on embedded image acquisition and processing system

Related Author

MA Zhong-lei

LANG Wen-hui

LI Xiao-ming

WEI Xing

SUN Chang-jun

LI Li-jing

ZHENG Shuai

SONG Shu-wen

Related Institution

School of Computer and Information,Hefei University of Technology

School of Instrument Science and Opto-electronics Engineering,Beihang University

Department of Logistics Information & Logistics Engineering,Logistical Engineering University

State Key Laboratory of Precision Measuring Technology&Instruments

Tai Gelin Paper Group

⁰