中北大学电子与计算机科学技术学院 仪器科学与动态测试教育部重点实验室
纸质出版:2013
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[1]刘冰,穆继亮,陈东红,丑修建,郭涛,熊继军.高k栅介质材料制备技术研究进展[J].传感器与微系统,2013,32(12):6-9.
LIU Bing, MU Ji-liang, CHEN Dong-hong, et al. Research progress in preparation techniques of high-k gate dielectric material[J]. 2013, 32(12): 6-9.
[1]刘冰,穆继亮,陈东红,丑修建,郭涛,熊继军.高k栅介质材料制备技术研究进展[J].传感器与微系统,2013,32(12):6-9. DOI: 10.13873/j.1000-97872013.12.015.
LIU Bing, MU Ji-liang, CHEN Dong-hong, et al. Research progress in preparation techniques of high-k gate dielectric material[J]. 2013, 32(12): 6-9. DOI: 10.13873/j.1000-97872013.12.015.
随着半导体器件特征尺寸的不断减小
传统SiO2栅介质减薄到1 nm以下时会导致栅极漏电流增大、器件可靠性下降等诸多问题
已无法满足CMOS技术长远发展要求。因此
寻求替代SiO2的新型栅介质材料
减少器件的隧穿电流
提升可靠性成为CMOS技术的发展方向。如何制备化学性质稳定、性能优异的栅介质薄膜成为高k栅介质材料亟待解决的问题。论述了理想高k栅介质材料的基本要求
重点介绍了高k栅介质材料制备技术的研究进展
并分析指出了高k栅介质材料制备技术的未来发展趋势。
As the feature size of semiconductor devices continues to decrease
the thickness of the traditional SiO2gate dielectric material has gradually been thinned to 1nm or less
leading to the increase of gate leakage current
the decline of reliability of the device and many other problems
so the SiO2gate dielectric material can not be able to satisfy the long-term development of CMOS technology. Therefore
new alternative materials
which can reduce tunnelling current and enhance the reliability of the device
to replace SiO2are needed to be found as the development direction of CMOS technology. How to prepare high-k gate dielectric film with stable chemical property and excellent performance is the key issue of high-k gate dielectric materials to be solved. Basic requirements for ideal high-k gate dielectric material are introduced
the research progress in high-k gate dielectric preparation techniques is highlighted
and the future development trend of high-k gate dielectric materials preparation techniques is analyzed and pointed out.
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