To satisfy the requirement that the router in network on chip can support multiple IP cores

and its latency performance is good

a router with a distributed routing and arbitrating structure is designed.Its arbitration module arbitrates on the request state of the current router and the state of the input buffer in the next router

this arbitration method improves the success rate of the packet transmission

so it decreases the transmission latency and improves latency performance of the router

meanwhile the simulation results indicate the router has good expansibility in area overhead.