YAN Chun-ping, ZHANG Cong-chun, ZHAO Xiao-lin, et al. Research of an integrated fabrication process of barrier layer and seed layer used in through silicon via[J]. 2012, 31(5): 55-57+61.
YAN Chun-ping, ZHANG Cong-chun, ZHAO Xiao-lin, et al. Research of an integrated fabrication process of barrier layer and seed layer used in through silicon via[J]. 2012, 31(5): 55-57+61. DOI: 10.13873/j.1000-97872012.05.014.
A novel process of barrier layer and seed layer used in through silicon via(TSV) is presented.Through magnetron sputtering
1 μm Ti membrane is deposited on SiO2.Surface of Ti membrane is oxidized for seed layer.Bottom of Ti membrane is treated as barrier layer.Filling material is Cu
which is deposited by electroplating method.For measuring the performance of Cu as barrier layer
annealing test is carried out.Three temperatures are selected
that is 350℃
400℃
450℃.XPS results indicate that under 400 ℃ barrier layer sucessfully suppresses the diffusion of Cu.Now
the structure is achieved in TSV and Cu filling is realized.
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references
Diffusion barrier performance of reactively sputtered Ta–W–N between Cu and Si [J] . Yuzhang Liu,Shuangxi Song,Dali Mao,Huiqin Ling,Ming Li. Microelectronic Engineering . 2004 (3)