With the dramatic increasing in size of FPGA’s configuration data

the low bandwidth of off-chip nonvolatile configuration memory becomes a main bottleneck during the reconfiguration of run-time reconfiguration（RTR）system.A new model named configuration speedup ratio was built for RTR system by taking into account the speed limits on two sides which were configuration memory and on-chip configuration interface.Compression and decompression systems were constructed based on LZSS encoding.Experimental results showed a higher configuration data ratio of a RTR system when using an algorithm with high configuration speedup ratio rather than that with good compression ratio.Configuration speedup ratio is much more competitive than compression ratio for evaluating the performance of a configuration compression system.