GAO Xuchao, LI Haihua. Design and implementation of ethernet queue scheduler module based on FPGA[J]. 2021, (6): 66-69. DOI: 10.13873/J.1000-9787(2021)06-0066-04.
IDRR scheduler is improved and designed based on the DRR scheduler
aiming at the problem that DRR scheduler cannot guarantee the requirements of QoS for real-time services.A time generation module is added to the new scheduling module to record the queuing time of real-time services.IDRR scheduler realizes the advance scheduling of real-time services by permitting real-time services to insert the output queue according to their queuing time.The hardware circuit design of this scheduler is implemented using field programmable gate array(FPGA)and the performance of the scheduler is tested in the ixia Ethernet test platform.The test results show that IDRR scheduler improves the Qos of real-time services in Ethernet communication without increasing the complexity of the system