LIU Shuai, YU Zhiguo, HONG Guangwei, et al. Design of on-chip aging detection module for microprocessor core[J]. 2021, (2): 89-91+94. DOI: 10.13873/J.1000-9787(2021)02-0089-03.
面向微处理器核的片上老化检测模块设计
摘要
为检测负偏压温度不稳定性(NBTI)效应导致的微处理器中组合逻辑路径延迟的增大
设计了一种可感知微处理器核NBTI效应的混合结构检测模块。检测模块包括老化延时探测模块及测量模块
能够准确测量NBTI效应造成的电路延时增量;相比于传统单一的延迟线结构
其面积开销降低40%。所设计的结构在ISCAS与OR1200核上实验
延时测量精度达到94%以上
可为微处理器的可靠性设计提供细粒度的防护。
Abstract
In order to detect the impact of the negative bias temperature instability( NBTI) effect on combinatorial logic path delay
a hybrid structure detection module for sensing the NBTI effect of the microprocessor core is designed. It includes mainly an aging delay detection module and a measurement module
which can measure the circuit delay caused by the NBTI effect accurately. Experimental results show that the area overhead is reduced by40 % compared to the traditional single delay line structure. The designed structure is tested on the ISCAS and OR1200 cores
and the delay measurement precision can reach more than 94 %
which can provide the fine-grained protection for the reliability design of microprocessors.