A low power consumption cascade-integrated-comb（CIC） decimation filter for digital temperature sensors is designed.Functionally

the filter is controlled for a single conversion and an adjustable decimation factor.Architecturally

CIC filters are implemented in six stages using non-recursive and polyphase decomposition.By using multi-phase clocks to control polyphase decomposition of each channel data transmission

polyphase decomposition control logic circuits are avoided.The combination of synchronous and asynchronous frequency division generates a clock frequency dividing circuit to reduce the complexity of the frequency dividing circuit.The usage of resource sharing techniques and the conversion of multiplication operations into shift addition operations can reduce the effects of coefficients introduced by polyphase decomposition on the circuit.The logic synthesis and power consumption analysis show that the designed filter system consume 28.6 % of the power of the pipeline Hogenauer CIC system

and 45% of the power of traditional non-recursive CIC filter system.