WU Zhen-qian, JIANG Zhi-di, YU Mu-dan. Design of digital processing system of self-contained acoustic current meter[J]. 2018, (12): 66-68. DOI: 10.13873/J.1000-9787(2018)12-0066-03.
并进行电源管理; FPGA模块应用复相关测频算法进行实时海流的测量;协同设计的微处理器与FPGA间软硬件接口保证了相互间的数据实时通信。实验测试结果为:系统在信噪比10 d B环境时测流误差不超过0. 94%;系统功耗低
待机功耗仅19 m W、工作功耗167 m W。
Abstract
For requirements of working power consumption and high realtime performance of self-contained ocean current meter
a digital processing system of self-contained acoustic ocean current meter with an architecture of microprocessor plus field programmable gate array( FPGA)
is designed
in which low power consumption processor achieves system level task maintenance and power management
and FPGA module fulfills realtime ocean current measurement adopting multiple correlation frequency measurement algorithm. Also
software-hardware interface between the microprocessor and the FPGA is designed to guarantee realtime data communication. Experimental results are given: the error of system is less than 0. 94 % in environment with signal to noise ratio( SNR) of 10 d B
and power consumption is low
which is only 19 m W standby and 167 m W operating power consumption.