CHEN Lin-na, MENG Jian-yi, LIN Zhi-tao. Design of hierarchical UVM verification platform for serial bus[J]. 2018, (9): 84-86+89. DOI: 10.13873/J.1000-9787(2018)09-0084-03.
In the existing universal verification methodology( UVM) verification platform
the verification components are tightly coupled to device under test( DUT)
resulting in poor reusability; on the other hand
the definition of UVM transaction uses the Field-Automation mechanism
call path is too long
increase simulation time of test cases. So
a design of public library for serial bus protocol verification is proposed
use hierarchical modeling method to design a reusable public library
by overrwriting virtual function method to improve the traditional transaction definitions. The experimental results show that the public library can be used to quickly build a serial bus verification platform
the improved transaction can shorten the simulation time of 10. 7 %